シニア デジタル デザイン エンジニア/ Sr. Digital Design Engineer

A global semiconductor company is looking for a Senior Digital Design Engineer. The selected candidate will design and verify high-performance digital circuits and collaborate with cross-functional engineering teams.tokyo

Responsibilities:

• Develop micro-architecture specifications based on product requirements
• Design RTL using Verilog or SystemVerilog from micro-architecture specs
• Create testbenches and verify RTL behaviour
• Write and verify SystemVerilog Assertions (SVA)
• Define timing constraints and clocks for synthesis and place & route
• Run synthesis tools and resolve timing issues
• Optimise design trade-offs including timing, area, and power
• Analyse Static Timing Analysis (STA) reports
• Collaborate with analogue, verification, backend, system, and test teams
• Support post-silicon bring-up and debugging

Requirements:

• Master’s degree or above in electrical engineering
• 2-5 years of experience in designing high-precision digital arithmetic logic and Digital Signal Processing
• 2-5 years of experience in designing Digital Phase-Locked Loops (DPLL)
• Proficient in Verilog, SystemVerilog, Perl, Tcl, Python
• Ability to design digital logic interacting with analogue circuits
• Basic understanding of signal processing and filter design
• Skilled in RTL design, synthesis, timing constraints, and STA
• Familiarity with Matlab, Simulink
• Proficient in English

About the Company:

Based in the United States, this international company manufactures analogue semiconductors. Its solutions allow clients to differentiate their products through improved performance and reliability.

Keywords:

半導体設計, デジタルロジック, タイミング解析, フィルタ設計, クロック設計, ポストシリコンデバッグ, スクリプト言語, 信号処理, 求人, 外資系

Job Ref: COEPVB